Design & Reuse IP SoC Day 2018 in Santa Clara
Milpitas, CA – April 3, 2018 – Open-Silicon, a system-optimized ASIC solution provider, will present “FlexE IP – A New Flexible Ethernet Client Interface Standard” at the Design & Reuse IP SoC Day in Santa Clara, CA on Thursday, April 5, 2018. The company will also showcase its Comprehensive Networking IP Subsystem Solution (FlexE IP, Interlaken IP, PCS IP and FEC IP) and demonstrate its High Bandwidth Memory (HBM2) IP Subsystem Solution for 2.5D ASICs in FinFET technologies.
Who: Vasan Karighattam, Vice President of Engineering, SoC, SSW and IP, Open-Silicon
What: “FlexE IP – A New Flexible Ethernet Client Interface Standard”
The traditional hierarchical network model with several explicit layers of devices has evolved into a much more simplified model consisting of a cloud services layer and a transport layer. This presentation will provide an overview of the FlexE (Flexible Ethernet) communications protocol, which allows for flexible Ethernet connectivity between routers and optical transport equipment that is independent of the physical interfaces between the two devices. This presentation then concludes with an overview of Open-Silicon’s FlexE IP core, which is fully compliant to the OIF FlexE standard and supports various MAC client rates.
When: April 5, 2018 at 5:35 pm, Track: More Innovative IP
Where: Hyatt Regency, Santa Clara, CA
About Design & Reuse IP SoC Day
This annual event provides an overview of the latest trends in IP-based electronic systems as well as information about the most advanced offerings from specialists in the field, ranging from foundries, EDA vendors, IP providers and design houses to electronic systems companies.
Open-Silicon is a system-optimized ASIC solution provider that innovates at every stage of design to deliver fully tested IP, silicon and platforms. To learn more, please visit www.open-silicon.com
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