Open-Silicon .:. Job Title: Functional Lead – DFT
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Location:   Bangalore, India.

Minimum Educational Qualifications: Bachelors/Masters Degree in Engineering. Technology Certifications

Relevant Experience:   8+ years

No of Opening:  2

Job Description:  Complete understanding of DFT concepts and flow (scan/ATPG/Memory BIST/ Bscan, Vtran/Simutest)
Develop/Plan complete DFT/test strategy for the device as per SOW
Create DFT implementation plan, delegate to team members and tracking
Test mode timing support/debug and closure at full chip level
Handle post-silicon pattern generation, Validation and ATE debug/support
DFT specification creation
Complete familiarity of tools used in DFT implementation (DC/RC, Tk/Tmax, Virage/Mentor memory BIST, Mentor Bscan) with expertise in one of them
Independently handle IP verification strategy and implement and verify the same
Good exposure to STA tool. Assist STA team in timing closure for DFT modes
Good scripting skills (TCL/Perl)
Familiarity with PD concepts/flow and assist PD team if and when required
Own full chip responsibilities
Interact with DM/FM, STA/PD/test/qual/customer team to communicate work progress and closure
Interact with tool vendors and debug tool related or IP related issues independently
Have foresight into execution. Create risk mitigation plan (RMP)
Participate in different project reviews. Conduct team meeting regularly
Generate/collect feedback from team members on project/tasks flow and initiate correction/improvement in methodology

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