How the design methods used to develop an IoT Gateway SoC with a customizable platform can reduce risk, schedule, and costs.
A gateway device plays a critical role in the Internet of Things (IoT) by collecting data from the sensors located at the network edge. It then filters, analyzes, and normalizes the data, and sends it to the cloud for sharing with the network. Designing a gateway SoC from scratch is a challenge that involves not only developing the SoC architecture, software, and hardware, but managing the integration and validation as well. These activities take a significant amount of time and require the involvement of a large design team, which results in longer design cycles and longer time-to-market. There are a variety of applications where these gateways are used, such as surveillance, deep learning, artificial intelligence, data storage, data security and more. Designing a custom SoC for each application from scratch is not a viable solution. Designing a single SoC for all the applications is also not feasible due to the huge investment, risk, and time consumption.
Gateway SoC design is greatly simplified when a gateway platform is utilized. A gateway reference platform offers a modular design that is fully customizable to enable multiple solutions on a single gateway SoC. This helps in reducing system BOM cost and speeding time-to-market. The reference platform approach enables efficient hardware and software partitioning, custom IP integration, and device software development during custom SoC development. The key to creating cost effective custom silicon for the IoT is the platform approach because it reduces risk, schedule, and cost.
A gateway SoC may be a simple device that captures the data from various slow-speed peripherals, then packs the data and sends it through low- to medium-speed peripherals to the cloud. The gateway SoC can also be a complex device that captures data from different high- and low-speed interfaces, performs pre- and post-processing of data, performs analytics, and then sends the resulting data to the cloud through high-speed interfaces. To build a gateway SoC suitable for different applications, it is important to perform partitioning of the silicon such that the simple gateway device is a subset of a complex gateway SoC. An intelligent approach is to keep the simple gateway SoC design as a basic building block and add other IP blocks to create complex gateway SoC variants. However, adding multiple application-specific IPs into a single SoC will increase cost, since each IP is expensive. Also, if an application does not use an IP, then the IP will be redundant for that SoC.
A gateway SoC needs to be validated for functionality, and this is achieved using a platform approach. All the IPs that need to be part of a simple gateway design are carefully selected such that the same IPs can be seamlessly reused in complex gateway designs. The fastest way to develop a gateway SoC is to use different pre-silicon design methodology platforms—including RTL, virtual, and FPGA platforms. By using these pre-silicon methodology platforms, the design can be verified in simulation. In addition, the software stack can be developed on the virtual prototyping platform, and the end use case application can be tested with real peripheral devices and software for functionality on the FPGA platform.
Software drivers are developed and tested along with RTL verification, so the bring-up effort on software development is greatly reduced. The FPGA prototyping platform aids the designer to test the design with real-life peripheral components or devices and check the functionality of the end product or design. This approach significantly boosts the confidence of the designer and the success rate of first-time working silicon at tape out.
Figure 1 shows the pre-silicon methodology platforms for successful IoT gateway SoC design.
Once the design is verified on pre-silicon methodology platforms and taped out for fabrication, the design team can ready for silicon bring-up by enhancing the software and designing the bring-up board. This increases the efficiency of the design team, consumes less design time, and reduces design errors.
During the gateway SoC design, the design team can create multiple designs for various end applications, retaining common core blocks and adding newer blocks to create additional variants that result in new silicon parts for different applications in a short amount of time.
The key advantages of using gateway SoC platforms is that the block, which is considered as core block, can be verified, and the software drivers can be written and used as the core library. New application-specific IPs can be seamlessly integrated with the verified core library and used to create new gateway SoC designs. By adding new test cases and designing new daughter cards for application-specific IPs, the validation of new designs can be performed faster, resulting in less design effort and minimal risk.
Figure 2 shows an example of a Gateway SoC consisting of generic and application-specific IP sections.
A sample IoT gateway SoC consists of two partitions, one with a generic IP section and the second consisting of an application-specific IP section. The generic IP section consists of IP blocks that are common across applications. Some of these are processor complex, DDR3/4 and flash memories, high speed peripherals, such as PCIe/USB/SATA, and low speed peripherals, such as SPI/I2C/UART/CAN/Timers.
The IPs in a generic IP section are carefully selected and verified on pre-silicon methodology platforms. In an FPGA platform, the daughter card is designed and contains all the peripherals required in the end application, and the design is verified close to the end application.
Once the generic IP section design is verified, different variants of the gateway SoC can be designed by adding application-specific IPs to the generic IP section based on end applications. The design with new IPs integrated is verified on the pre-silicon methodology platforms. An add-on daughter card with specific peripheral devices can be designed to validate the newly added application-specific IPs. Several SoCs can be designed in parallel for different applications. This will reduce time-to-market, minimize bugs in the design, and lower overall design cost.
The gateway SoC methodology platforms were utilized in an IoT gateway custom SoC design. The SoC is intended to be used for IoT gateways in smart city applications. Figure 3 shows the smart city IoT gateway reference board built around the custom SoC. The gateway is a full featured device that supports various types of wireless and wireline connectivity, communicates with IoT edge devices, and connects to the cloud through 3G/LTE/WiFi.
It will be industry best practice to utilize the IoT SoC platform approach, as detailed above, to design custom SoCs for various IoT applications with reduced risk, schedule, and cost.
Naveen HN is an Engineering Manager for Open-Silicon. He oversees board design, post-silicon validation and system architecture. He also facilitates Open-Silicon’s SerDes Technology Center of Excellence and is instrumental in the company’s strategic initiatives. Naveen is an active participant in the IoT for Smart City Task Force, which is an industry body that defines IoT requirements for smart cities in India.