Open-Silicon .:. Events
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SiFive, Credo and Open-Silicon Showcase End-to-End Solutions for HPC and Networking Applications at SC18 in Dallas…

SiFive, Credo and Open-Silicon will exhibit complete end-to-end solutions for HPC and networking applications at Supercomputing 2018 (SC18) in Dallas, TX. The co-demonstration illustrates the capabilities of SiFive’s highest performance…




Open-Silicon to Demonstrate and Present on Custom SoC Platform Solutions for AI Applications at the TSMC OIP Event in Santa Clara

Open-Silicon, a system-optimized ASIC solution provider and long-standing member of TSMC’s Value Chain Aggregator (VCA) and Design Center Alliance (DCA) programs, will present on custom SoC platform solutions for AI…




Open-Silicon and Credo Demonstrate Solutions for Deep Learning and Networking Applications at TSMC OIP and Symposium in Amsterdam…

Open-Silicon, a system-optimized custom SoC solution provider and long-standing member of TSMC’s Value Chain Aggregator (VCA) and Design Center Alliance (DCA) programs, and Credo, a global innovation leader in Serializer-Deserializer (SerDes) technology,…




Open-Silicon to Present at TSMC OIP Theater at DAC 2018…

Open-Silicon, a system-optimized ASIC solution provider and long-standing member of TSMC’s Value Chain Aggregator (VCA) and Design Center Alliance (DCA) programs, will present on three topics at the TSMC Open…




Open-Silicon to Demonstrate its HBM2 IP Subsystem Solution for High Performance Computing Applications, and Showcase its Comprehensive IP Subsystem Solution for High-End Networking Applications at TSMC Technology Symposium 2018, Boston…

Open-Silicon, a system-optimized ASIC solution provider, will demonstrate its Comprehensive High Bandwidth Memory (HBM2) IP Subsystem Solution for 2.5D ASIC SiPs in TSMC FinFET/CoWoS technologies, and showcase its Comprehensive Networking…




Open-Silicon to Showcase its HBM2 IP Subsystem Solution for High Performance Computing Applications and Comprehensive IP Subsystem Solution for High-End Networking Applications at TSMC Technology Symposium 2018, Austin…

Open-Silicon, a system-optimized ASIC solution provider, will showcase its Comprehensive High Bandwidth Memory (HBM2) IP Subsystem Solution for 2.5D ASIC SiPs in TSMC FinFET/CoWoS technologies and Comprehensive Networking IP Subsystem…




Open-Silicon to Demonstrate its High Bandwidth Memory (HBM2) IP Subsystem Solution for High Performance Computing Applications, and Showcase its Comprehensive IP Subsystem Solution for High-End Networking Applications at TSMC Technology Symposium 2018, Santa Clara…

Open-Silicon, a system-optimized ASIC solution provider, will demonstrate its Comprehensive High Bandwidth Memory (HBM2) IP Subsystem Solution for 2.5D ASIC SiPs in TSMC FinFET/CoWoS technologies, and showcase its Comprehensive Networking…




Open-Silicon to Showcase its Comprehensive IP Subsystem Solution for High-End Networking Applications and present on the topic “FlexE IP – A New flexible Ethernet client interface standard” at IP SoC, Santa Clara…

Open-Silicon, a system-optimized ASIC solution provider, will showcase its Comprehensive IP Subsystem Solution for High-End Networking Applications and demonstrate its Comprehensive High Bandwidth Memory (HBM2) IP Subsystem Solution for 2.5D…




Open-Silicon to Showcase its Comprehensive IP Subsystem Solution for High-End Networking Applications, and Demonstrate its High Bandwidth Memory (HBM2) IP Subsystem Solution for High Performance Computing Applications at OFC 2018…

Open-Silicon, a system-optimized ASIC solution provider, will showcase its Comprehensive IP Subsystem Solution for High-End Networking Applications, and demonstrate its Comprehensive High Bandwidth Memory (HBM2) IP Subsystem Solution for 2.5D…




Open-Silicon Showcases its 2.5D ASIC SiP Capabilities and Breadth of ASIC Solutions, Including its HBM2 IP Subsystem Solution and its Comprehensive Networking IP Subsystem Solution, at DesignCon 2018….

Open-Silicon, a system-optimized ASIC solutions provider, will be exhibiting at DesignCon 2018 in Santa Clara, CA on Jan. 31 and Feb. 1, 2018. The company will showcases its 2.5D ASIC SiP…




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