• Hybrid Memory Cube
• MAX Technology
  • MAX Technology
  • PowerMAX
  • CoreMAX
  • VariMAX
  • TestMAX

MAX Technology

Don't Let the Technology Avalanche Leave You Buried In the Snow

Moore's Law tells us that digital transistor density is doubling every two years.  However, these foundry process advances no longer provide us with the same process-driven gains in the areas of power and performance.  Also, these new technologies have definite limitations in transistor leakage and the ability to tightly control the process variability. And yet customers still need to build the best possible custom silicon to gain an advantage in the marketplace.

The EDA community, alongside the wafer foundries and process equipment manufacturers, have worked hard to address these limitations with improved methodologies and new sophisticated forms of analysis.  However, while these EDA toolsets are common across the IC design landscape, they can be substantially improved upon. 

Open-Silicon's MAX Technologies represent patented and proven design technology to increase processor performance, lower design power, and manage process variability through post-silicon compensation techniques. Using a design-specific library augmentation, Open-Siliocn creates new cells, called ZenCells™ that are used for improving power and speed.

PowerMAX

PowerMAX focuses on lowering design power, in particular leakage power. The advent of High K Metal Gate technology has allowed us to resume scaling the gate voltage without fear of gate leakage, leaving subthreshold leakage as the undisputed king of battery drain in today's mobile devices.

CoreMAX

Open-Silicon offers the experience from almost 100 processor hardenings including: ARM, MIPS, PowerPC, Tensilica, ARC, Customer Proprietary, and DSP.

Open-Silicon's CoreMAX focuses on two areas for processor performance enhancement:

• Design Specific Library Augmentation
• Think Physical RTL Design

VariMAX

Open-Silicon 65nm test chip silicon results are shown to right.  Note that some devices burn more power from leakage than they do from dynamic power, while others leak very little at all.  A couple of the devices burn 300mW with the clock off, while others burn only 200mW while running 580MHz.  This is the deep submicron variability problem.

 

The VariMAX technology uses post-silicon compensation schemes to reduce power, improve yields, and potentially increase performance.