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Arasan
Arasan’s product family is focused on Bus Interface Technologies including MIPI, USB, PCI, SDIO, as well as our ARM based BusStop SoC platform. Arasan also addresses the fast growing portable memory markets of SD, MMC/eMMC, MS, xD & NAND technologies.
IP
The IP Selection Challenge
It is very common for IP to be procured from multiple vendors. Working with each vendor requires careful management of technical, quality, business and legal issues. Taking hard-IP as an example, modern SoCs often integrate multiple high-speed serial interfaces, such as PCIe, USB, and XAUI, memory interfaces such as DDR, CPUs such as ARM, MIPS, and Tensilica, and analog IP, including ADCs, DACs, PLLs, DLLs, and power management blocks, next to library and commodity IP that includes memories, IOs, and standard cells.
Various product development parameters, including time-to-market, cost, features, area, power and performance, drive selection of both technology and IP. For example, a low-voltage device with a unique interface may require a low-power technology, which means the unique interface IP that is needed now has the additional constraint of having to be available in that low-power technology. In addition, the risks associated with a possible lack of proven quality for that IP need to be weighed and taken into account when selecting the IP from various IP vendors.
Finally, as part of the IP selection-process, both compatibility and inter-operability need to be insured. For example, in TSMC's 90G process multiple voltages can be supported for the IO oxide (1.8, 2.5 and 3.3V). However, not all combinations are supported at this technology node. The selection of IO libraries and PHYs needs to take this into account to ensure compatibility of the selected IP. Another example involves DDR PHYs and their associated controllers where interoperability concerns exist, especially in case when the DDR and the PHY are procured from different vendors, since the standard for the interface between them is new and may to a large extent still be unproven.
Selecting and integrating IP is rapidly becoming the biggest challenge of the SoC/ASIC industry. The success of an SoC depends on the careful selection of reliable IP. Selecting the correct IP involves lengthy procurement time, and legal and business negotiations in addition to significant technical qualifications.
Open-Silicon Demystifies IP Selection and Integration
Open-Silicon has a dedicated IP team that works with a wide variety of IP providers and is continually qualifying and ranking IP and updating our portfolio of recommended IP. Our primary goal is to help you make informed IP decisions that differentiate your product, assure IP quality and reusability, and deliver first-time working silicon.
Our IP experts work continuously with customers and IP vendors to identify market needs for IP with a special focus on early identification and development of IP to meet emerging standards.
Our capability to tailor IP to your specific needs combined with our wide portfolio of IP enables us to provide the optimal IP solution for each SoC.
The Open-Silicon IP advantages include:
- Experience from over 600 successful IP integrations to date.
- IP aggregation model with pre-negotiated contracts that provides easy, cost-effective access to pre-qualified IP from a wide variety of vendors.
- Strong relationships with our IP partners, and deep understanding of the IP development and integration process, that ensures timely delivery and integration of IP in the design phase, leading to predictable schedules.
- Our multi-step approach to seamless IP integration ensures that high quality silicon-proven IP is used in the design, leading to first-time silicon success.
- Single contract with Open-Silicon greatly streamlines the licensing and purchasing of IP.