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Open-Silicon to Exhibit at GTC, Munich to Demonstrate its Comprehensive HBM2 IP Subsystem Solution for 2.5D ASICs…

Open-Silicon, a system-optimized ASIC solutions provider, will be exhibiting at GTC (GlobalFoundries Technical Conference), Munich on October 13, 2017. The company will demonstrate its Comprehensive High Bandwidth Memory (HBM2) IP Subsystem Solution for 2.5D ASICs.

  • Comprehensive High Bandwidth Memory (HBM2) IP Subsystem Solution for 2.5D ASICs – This solution is now available for 2.5D ASIC design starts and also as licensable Intellectual Property (IP). Open-Silicon’s IP fully complies with the HBM2 JEDEC® standard. The IP translates user requests into HBM command sequences (ACT, Pre-Charge) and handles memory refresh, bank/page management and power management on the interface. The IP includes the PHY and custom die-to-die I/O needed to drive the interface between the logic-die and the memory die-stack on the 2.5D interposer.  http://www.open-silicon.com/high-bandwidth-memory-ip

When: Friday, October 13, 2017
Where: Sofitel Munich Bayerpost, Munich.

About Open-Silicon
Open-Silicon transforms ideas into system-optimized ASIC solutions within the time-to-market parameters desired by customers. The company enhances the value of customers’ products by innovating at every stage of design — architecture, logic, physical, system, software and IP — and then continues to partner to deliver fully tested silicon and platforms. Open-Silicon applies an open business model that enables the company to uniquely choose best-in-industry IP, design methodologies, tools, software, packaging, manufacturing and test capabilities. The company has partnered with over 150 companies ranging from large semiconductor and systems manufacturers to high-profile start-ups, and has successfully completed 300+ designs and shipped over 130 million ASICs to date. Privately held, Open-Silicon employs over 250 people in Silicon Valley and around the world.  To learn more, visit www.open-silicon.com