Edition 8, Oct. 2016     (for previous editions, click here)

Open-Silicon Tapes Out Industry's First High Bandwidth Memory (HBM2) IP Subsystem Solution for 2.5D ASICs in 16nm FF+

2Gbps Per Pin Data Rate at Longer Trace Lengths; Available for 2.5D ASIC Design Starts and Also as a Licensable IP Subsystem
 
MILPITAS, CA-(Marketwired - September 28, 2016) - Open-Silicon, a system-optimized ASIC solution provider, today announced it has successfully taped out the industry's first High Bandwidth Memory (HBM2) IP subsystem in TSMC's 16nm FF+ process in combination with TSMC's CoWoS® 2.5D silicon interposer technology. This full IP subsystem solution includes an HBM2 controller, PHY and interposer I/O, all developed in-house, and completes the critical components needed for the successful integration of HBM2 memory into ASIC system-in-package (SiP) designs. The HBM2 IP subsystem solution is available for 2.5D ASIC design starts and also as a licensable Intellectual Property (IP) subsystem....Read on...
  
            
Open-Silicon Strengthens Management Team With Key Executive Appointments... Read on...
   
Open-Silicon Extends Long-Term Collaboration with Mentor Graphics Technologies for Custom SoC Design Success... Read on...
   
Upcoming Events:
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Open-Silicon to Showcase High Bandwidth Chip to Chip and Chip to Memory Interface IP Solutions and Present a Paper on "HBM2 IP Subsystem Solution for High Bandwidth Memory Applications" at REUSE 2016, Mountain View, CA, Dec. 1, 2016...Click here for details...
  
      
   
Recent Events:
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Open-Silicon Showcased Breadth of ASIC Solutions at TSMC Open Innovation Platform® (OIP) Ecosystem Forum 2016, San Jose, CA on Sep. 22. The company also demonstrated its IoT ASIC Platform and presented other ASIC solutions including The HBM Gen2 IP Subsystem Solution in TSMC 16nm FF+, 28Gbps SerDes Evaluation Platform in TSMC 28nm,  HMC 2.0 Memory Controller ASIC IP,  Interlaken IP and  2.5D SoC Solution... Click here for details...
     
Open-Silicon Showcased Breadth of ASIC Solutions at CDNLive 2016, Bangalore, India on August 9 - 10. The company also underscored its growing expertise in developing and delivering advanced ASIC solutions through several presentations...Click here for details...
  
Open-Silicon technical paper, titled "Pipeline Based MBIST Area Overhead Optimization Using STAR Memory System 4.xwas published by SNUG India 2016... Click here to view the paper...
   
Open-Silicon Showed it's IoT ASIC Platform at 2016 TSMC Tech Symposium, Japan on July 1, 2016... Click here for details...
            
About Open-Silicon
   
Open-Silicon transforms ideas into system-optimized ASIC solutions within the time-to-market parameters desired by customers. The company enhances the value of customers' products by innovating at every stage of design - architecture, logic, physical, system, software, and IP - and then continues to partner to deliver fully tested silicon and platforms. Open-Silicon applies an open business model that enables the company to uniquely choose best-in-industry IP, design methodologies, tools, software, packaging, manufacturing, and test capabilities. The company has partnered with over 150 companies ranging from large semiconductor and systems manufacturers to high-profile start-ups, and has successfully completed 300+ designs and shipped over 120 million ASICs to date. Privately held, Open-Silicon employs over 250 people in Silicon Valley and around the world. 
To know more visit: www.open-silicon.com
 
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