Job Openings - India

To apply for any of our open positions, please send an e-mail to careers@open-silicon.com.

Test Engineering Manager
ASIC Design Manager/Project Lead
Senior ASIC Design Engineers/ASIC Design Engineers
Senior IP Engineer
IP Engineer

* Employment Agencies/Recruiters Please Read First

 

Job Title: TEST ENGINEERING MANAGER (Job Code: PTM-B-08)

Min Educational Qualification: BSEE/MSEE

Relevant Experience: 7+ years ATE experience

Responsibilities:
Candidate will have responsibility for managing ATE test development group in India. Will create, modify and maintain programs for prototype, productions and characterization of Open-Silicon products. Will be responsible for ensuring a predictable and smooth test flow from design through sort and final test. Will work closely with other functional groups (design, product engineering and QA) to resolve issues and drive product prototype evaluation and production releases. Will also manage outside test resources and drive test partners to achieve high quality deliverables, on time delivery and low cost. Requirements:

  • BSEE (MSEE preferred). Or equivalent experience
  • 7+ years ATE hands on experience and managerial skills
  • Familiarity with ATE programming and equipment (Verigy / Teradyne preferred)
  • Good software discipline for creation of ATE programs
  • C and Unix experience
  • Effective communication and analytical skills
  • Design For Test (DFT) experience is a plus

 

Job Title: ASIC Design Manager/Project Lead (Job Code: ADM-B-06)

Min Educational Qualifications:A BSEE /MSEE

Job Description: Relevant Experience with 7 -10 years in ASIC design having led two (or) more designs through physical design Be a part of a dynamic start-up environment and work with a highly motivated, customer - oriented team that focuses on high quality, timely delivery of ASIC Design and Manufacturing services to customers handling multi-million gate ASICs. ASIC Design Manager Should be able to technically lead a team of engineers involved in various phases of ASIC Implementation. Should be able to provide technical support to customers throughout the implementation cycle. Should have successfully led one or more design tape-outs of complex multi-million gate ASICs. Candidates should have exposure to current technology / flow challenges. Good presentation, communication skills and leadership qualities

Requirements:
Candidates are expected to have good hands-on experience in the following areas

  • RTL Synthesis
  • DFT Insertion, test analysis
  • Floor Planning
  • Place & Route
  • Clock Tree Synthesis
  • Static Timing Analysis
  • Cross talk & Power Analysis
  • Physical Verification


  • Candidates should be conversant with industry-standard tools like

  • Synopsys
  • Magma
  • Calibre
  • Cadence
  •  

    Job Title: Senior ASIC Design Engineers / ASIC Design Engineers (Job Code: SDE-B-06)

    Min Educational Qualifications: BSEE/MSEE
    Job Description:Relevant Experience 3-6+ years of experience in ASIC design. You will participate in the design tape-outs of complex multi-million gate ASICs with major emphasis on the use of Magma design tools.

    Job Requirements:
    Candidates are expected to have sufficient hands-on experience in the following areas:

    • Place & Route using Magma BlastFusion
    • RTL Synthesis
    • DFT Insertion
    • Test analysis
    • Floor Planning
    • Clock Tree Synthesis
    • Static Timing Analysis
    • Cross talk & Power Analysis
    • Physical Verification


    Candidates should be conversant with industry-standard tools like:

    • Synopsys
    • Magma
    • Calibre
    • Cadence

    Additionally, candidates should have participated in one or more design tape-outs of complex multi-million gate ASICs.

     

    Job Title: IP SENIOR Engineer (2 positions) (Job Code: IPE-B-06)

    Min Educational Qualifications: Bachelor’s degree in Electronics Engineering, Computer Science, or closely related field, or the equivalent. MSEE is preferred.

    Relevant Experience: 6-10 years of experience in Applications Engineering or IC Design development and implementation of various digital blocks that includes standard cells, memories, I/O’s and digital cores.

    Job Description: As part of this job, your responsibilities will be:

  • Qualification and integration of various types of standard cells, memories, I/O’s and digital cores.
  • Work very closely with IP Vendors in defining, qualifying and procuring new custom and existing digital blocks.
  • Provide product and technical support to and Physical Design organizations.
  • Be able to use front and back end tools for qualification of the IP.

    Requirements:
  • Must be able to write scripts for automation.
  • Experience with Front and Back-end (Including HSPICE) tools from Magma and Synopsys.
  • Experience with ESD/latch-up and process technologies is highly desirable.
  • Excellent writing and communication skills are required.
  • SerDes experience is a plus.

    Job Title: IP Engineer (3 positions) (Job Code: IPE-B-06)

    Min Educational Qualifications: Bachelor’s degree in Electronics Engineering, Computer Science, or closely related field, or the equivalent. MSEE is preferred.

    Relevant Experience: 3 - 6 years of experience in Applications Engineering or IC Design development and implementation of various digital blocks that includes standard cells, memories, I/O’s and digital cores.

    Job Description: As part of this job, your responsibilities will be:

  • Qualification and integration of various types of standard cells, memories, I/O’s and digital cores.
  • Work very closely with IP Vendors in defining, qualifying and procuring new custom and existing digital blocks.
  • Provide product and technical support to Physical Design organizations.
  • Be able to use front and back end tools for qualification of the IP.

    Requirements:
  • Must be able to write scripts for automation.
  • Experience with Front and Back-end (Including HSPICE) tools from Magma and Synopsys.
  • Excellent writing and communication skills are required.

    ** Employment Agency / Recruiter Policy -- PLEASE READ ** **
    Thank you for your interest in Open-Silicon, Inc. Please note, however, that Open-Silicon does not accept unsolicited resumes from external agencies with which we do not have an existing relationship. Any third-party resume forwarded by agencies/recruiters will be considered property of Open-Silicon and treated as a direct application. This exchange does not constitute an agreement between Open-Silicon and the agency/recruiter. Open-Silicon reserves the right to contact the candidate directly. Employment agencies/recruiters will receive no compensation from Open-Silicon.