Download or Request: Submit ASIC Requirements for Quote 28G SerDes Evaluation Platform Virtual Prototyping Brochure HMC ASIC IP Product Brief

Author admin



» Author's Latest Posts


Open-Silicon Expands Networking IP Portfolio to Address High-Bandwidth Ethernet Endpoint and Ethernet Transport Applications

Comprehensive IP subsystem includes Interlaken, Ethernet PCS, Flex Ethernet and Forward Error Correction IPs MILPITAS, Calif., Nov. 13, 2017 (GLOBE NEWSWIRE) — Open-Silicon today announced the availability of a comprehensive…




Open-Silicon to Demonstrate its High Bandwidth Memory (HBM2) IP Subsystem Solution for High Performance Computing Applications and Present on its Comprehensive IP Subsystem Solution for High-End Networking Applications at REUSE 2017…

Open-Silicon, a system-optimized ASIC solutions provider, will be exhibiting at REUSE 2017 in Santa Clara, CA on December 14, 2017. The company will demonstrate its comprehensive high bandwidth memory (HBM2) IP…




Enabling High-Bandwidth Networking Applications with Multi-Channel Multi-Rate Forward Error Correction (MCMR FEC) IP

Date: Thursday, December 7, 2017 Time: 8 AM PST/ 11AM EST About the Webinar: This Open-Silicon webinar, moderated by Eric Esteve of SemiWiki, will address the benefits of the multi-channel…




Open-Silicon to Demonstrate its High-Bandwidth Memory (HBM2) IP Subsystem Solution for High Performance Computing Applications and Showcase its Networking IP Subsystem for High-Bandwidth Networking Applications at SC17…

Open-Silicon to Demonstrate its High-Bandwidth Memory (HBM2) IP Subsystem Solution for High Performance Computing Applications and Showcase its Networking IP Subsystem for High-Bandwidth Networking Applications at SC17… Open-Silicon, a system-optimized…




Open-Silicon to Demonstrate its High Bandwidth Memory (HBM2) IP Subsystem Solution for High Performance Computing and Networking Applications and Showcase its IoT Gateway SoC Reference Design for Smart City Applications at ARM TechCon 2017…

Open-Silicon, a system-optimized ASIC solutions provider, will be exhibiting at ARM TechCon 2017. The company will demonstrate its comprehensive high bandwidth memory (HBM2) IP subsystem solution for 2.5D ASICs in FinFET technologies….




Open-Silicon to Exhibit at GTC, Munich to Demonstrate its Comprehensive HBM2 IP Subsystem Solution for 2.5D ASICs…

Open-Silicon, a system-optimized ASIC solutions provider, will be exhibiting at GTC (GlobalFoundries Technical Conference), Munich on October 13, 2017. The company will demonstrate its Comprehensive High Bandwidth Memory (HBM2) IP Subsystem…




Highest Performance Interlaken Chip-to-Chip Interface IP

Devendra Godbole, Kalpesh Sanghvi — Open-Silicon Explore Open-Silicon IP here Supports up to 1.2Tbps and up to 56Gbps SerDes rates Open-Silicon’s eighth-generation Interlaken IP supports up to 1.2Tbps high-bandwidth performance and up…




Open-Silicon to Present at the IEEE Electronic Design Process Symposium (EDPS) in Milpitas, CA

MILPITAS, CA–(Marketwired – September 19, 2017) – Open-Silicon, a system-optimized ASIC solution provider, today announced that its vice president of manufacturing operations, Asim Salim, will present “High Volume Manufacturing Supply Chain…




Open-Silicon Completes Successful Silicon Validation of High Bandwidth Memory (HBM2) IP Subsystem Solution

Open-Silicon Completes Successful Silicon Validation of High Bandwidth Memory (HBM2) IP Subsystem Solution Silicon validation in TSMC’s 16nm FinFET technology and interoperability with HBM2 memory; Silicon-proven SoC solution enables next…




Modified clock filters improve at-speed test

Basanagouda Patil , Avinash Sekar & Peeyush Pranay -August 29, 2017 Publishes by edn.com The push for higher performance at lower power and cost has driven the VLSI industry towards System-on-Chip (SoC) integration resulting in…




← Older news