Download or Request: 28G SerDes Evaluation Platform Virtual Prototyping Brochure HMC ASIC IP Product Brief

[Press Release] Open-Silicon Establishes High-Speed SerDes Technology Center of Excellence

Open-Silicon Establishes High-Speed SerDes Technology Center of Excellence

Ensures Rapid, Cost-Effective Delivery of ASICs with Advanced High-Speed SerDes IP up to 28Gbps

 

MILPITAS, CA–(Marketwired – August 07, 2014) – Open-Silicon today announced it has established a SerDes Technology Center of Excellence (TCoE) to ensure rapid, cost-effective design and production of ASICs integrating high-speed serial technologies. The SerDes TCoE will enable new ASIC products with capabilities such as PCI Express (PCIe Gen 1/2/3/4), SATA, Hybrid Memory Cube (HMC), Interlaken and networking up to 100G.

The TCoE provides access to unparalleled front-end and back-end design capabilities, IP integration, and packaging and test services – all intended to improve product time-to-market and quality. Open-Silicon applies its unique, high-speed serial design expertise to ensure the successful delivery of ASICs that will drive a new generation of high-speed networking equipment and Internet of Things (IoT) appliances.

“Our new SerDes TCoE fits well with our strategy to engage with customers at every level of design from concept through to manufacturing,” said Taher Madraswala, president of Open-Silicon. “By addressing customer challenges holistically, we ensure our customers meet their power, performance, cost and time-to-market goals — something that is becoming increasingly more challenging as the industry extends into deep sub-nanometer process technologies.”

About the Open-Silicon SerDes TCoE

The Open-Silicon SerDes TCoE focuses on five key areas to enable the success of any ASIC requiring a high-speed SerDes:

  • Channel Evaluation: Identify the right SerDes solution by evaluating the channels intended for the system
  • PCS and Controller Solutions: Evaluate the PCS and Controller/MAC requirements for the interface to the core and optimize for interoperability of hard and soft macros
  • Physical Integration: Evaluate the metal stack compatibility, special layer/Vt requirements, placement of SerDes on chip and bump plan for physical verification and packaging
  • Package/Board Design: collaborative work on packaging and board design including 3D parasitic extraction, Crosstalk/SSO/Noise Analysis and other system-level considerations
  • Silicon Bring-up: Close coordination with DFT and Test team for bring-up and quick assessment on ATE.

“High-speed SerDes integration has become increasingly complex and only a handful of companies have deployed ASICs in support of the higher bandwidth standards to date,” said Rich Wawrzyniak, senior market analyst with Semico Research. “By establishing a SerDes TCoE, Open-Silicon is enabling more companies to have access to high-speed SerDes technology across more applications.”

Open-Silicon has taped out more than 250 ASIC designs integrating IP from more than a dozen different IP vendors across six major foundries on multiple nodes. ASIC, EDA and ASSP companies have collaborated with Open-Silicon on all aspects of design and manufacturing for both high-volume and high-value silicon products.

“We have worked with Open-Silicon on nearly 25 high-speed serial designs, including those integrating the latest PCI Express, SATA, 10G-KR, XAUI and other high-speed compute, storage, and networking interfaces at very advanced nodes,” said Kevin Walsh, director of worldwide marketing for the Snowbush® IP family of products from Semtech. “Our mutual customers rely and trust Open-Silicon to deliver world class ASICs by applying their integration expertise in areas including design for test, physical design and packaging.”

About Open-Silicon

Open-Silicon transforms ideas into system-optimized ASIC solutions within the time-to-market parameters desired by customers. The company helps substantially enhance the value of customers’ products by innovating at every stage of design — architecture, logic, physical, system and software — and then continues to partner to deliver fully tested silicon and platforms. Open-Silicon draws from its extensive IP and technology portfolio to push the limits of SoC design and performance. In addition, the company’s uniquely open business model gives it the ability to choose best-in-class IP, design methodologies, tools, software, packaging, manufacturing and test capabilities that result in a defective parts per million (DPPM) ratio far exceeding industry standards. Open-Silicon has partnered with over 150 companies ranging from large semiconductor and systems manufacturers to high-profile start-ups, and has successfully shipped nearly a hundred million ASICs to date. Privately-held, Open-Silicon employs over 350 people in Silicon Valley and around the world. www.open-silicon.com.

You can view this press release at http://www.eejournal.com/archives/news/20140807-02/

#             #             #

Open-Silicon is a trademark and service mark of Open-Silicon, Inc., registered in the United States and other jurisdictions.  All other trademarks are the property of their respective holders.